<p><span class="legendSpanClass"><strong>SAN JOSE</strong> </span>&#8212; <a href="https://edge.prnewswire.com/c/link/?t=0&;l=en&;o=4730495-1&;h=2733619109&;u=https%3A%2F%2Fwww.tylsemi.ai%2F&;a=TYLsemiTM" target="_blank" rel="nofollow noopener">TYLsemi</a> has emerged from stealth and closed an oversubscribed $43 million early-stage funding round to accelerate the development of AI infrastructure. TYLsemi is the first chiplet platform company to deliver a full portfolio across IO, power delivery, and memory paired with a chiplet-based custom silicon design, integration and supply-chain ownership. This standards-based, production-ready portfolio will provide AI infrastructure customers with a faster, lower-risk path for developing AI silicon from architecture to deployment.</p>
<p>The funding round was led by Matter Venture Partners with participation from Viola Ventures, GHOVC, Egis Technology, and strategic investment from leading companies across the global semiconductor and AI infrastructure ecosystem. The company was co-founded by industry leaders Mohit Gupta and Sunil Bhardwaj, who have led and scaled businesses and worldwide engineering and operations teams at Alphawave (acquired by Qualcomm), SiFive, Cadence Design Systems, Rambus, and other leading semiconductor companies.</p>
<p>&#8220;The AI accelerator market is on track to reach <a href="https://edge.prnewswire.com/c/link/?t=0&;l=en&;o=4730495-1&;h=3412179971&;u=https%3A%2F%2Fwww.bloomberg.com%2Fcompany%2Fpress%2Fai-accelerator-market-looks-set-to-exceed-600-billion-by-2033-driven-by-hyperscale-spending-and-asic-adoption-according-to-bloomberg-intelligence%2F&;a=%24604+billion+by+2033" target="_blank" rel="nofollow noopener">$604 billion by 2033</a> and custom silicon XPUs built for specific hyperscaler workloads are the fastest-growing segment,&#8221; said Mohit Gupta, Founder and CEO of TYLsemi. &#8220;At that scale, chiplet-based design is no longer optional, yet there is no pure-play chiplet company serving this market with a full portfolio. TYLsemi closes that gap with standards-based chiplets combined with UCIe-based die-to-die connectivity, XPU-aware design, packaging, and integration — giving customers a fast, proven path to AI-era silicon.&#8221;<b></b></p>
<p>AI systems are shifting from monolithic chips to distributed, multi-die architectures as chip size approaches physical limits and connectivity and power become bottlenecks. At the same time, advances in packaging technologies are making it possible to integrate multiple dies into a single system. With the emergence of standardized interconnects such as UCIe, chiplet-based design is now practical and scalable.</p>
<p>&#8220;AI infrastructure is undergoing a fundamental shift toward modular, chiplet-based design, but the ecosystem has not kept pace,&#8221; said Jim Handy, General Director at Objective Analysis. &#8220;This represents a significant opportunity for a company such as TYLsemi that can deliver pre-validated, standards-based silicon to accelerate AI infrastructure silicon deployment.&#8221;</p>

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